LLM-Guided Algorithm Discovery
Using LLMs and circuit feedback to discover and adapt optimization algorithms.
AI FOR EDA OPTIMIZATION ACROSS RTL, LOGIC SYNTHESIS, AND PHYSICAL DESIGN
I am a Ph.D. candidate in Computer Science at National Tsing Hua University, advised by Prof. Chun-Yao Wang and Prof. Bei Yu. I received an M.S. in Computer Science from National Tsing Hua University in 2023 and a B.S. in Computer Science and Information Engineering from Ming Chuan University in 2021.
My research focuses on LLMs for EDA, particularly algorithm discovery and design-adaptive optimization. Building on my work in RTL recovery, logic synthesis, and physical design, I explore LLM-guided optimization across the circuit design flow.
I have received more than ten awards in international EDA contests, including three first-place awards in the ICCAD CAD Contest and CADathlon. I am also a recipient of the Synopsys – Prof. Chung Laung Liu Ph.D. Scholarship.
Our team has been selected for an Honorable Mention in Problem A of the ICCAD 2026 CAD Contest. [to appear]
Trinity, our new preprint on generative floorplanning, is now available on arXiv. [Project] [arXiv] [Code]
Our team won Second Place in the MLCAD 2026 Contest. Our invited paper, TAPCO, was presented at MLCAD 2026. [Certificate] [Official] []
Received the Excellent Teaching Assistant Award and an Outstanding Teaching Assistant Award at National Tsing Hua University. [Certificate] [Trophy] [Photo]
Received the Distinguished Alumnus Award from the Department of CSIE at Ming Chuan University. [Certificates]
Our team won Second Place in the IWLS 2026 Programming Contest. [Certificate] [Photos] [Official] []
I develop AI-driven algorithms for faster, smaller, and more energy-efficient circuits.
Using LLMs and circuit feedback to discover and adapt optimization algorithms.
Recovering RTL from gate-level circuits and learning synthesis strategies that reduce circuit complexity.
Combining learned models and optimization to improve placement, cell sizing, timing, and power.
* denotes equal contribution.
ACM/IEEE International Symposium on Machine Learning for CAD Jeju, South Korea, Sep. 7–9, 2026
@inproceedings{Tang2026TAPCO,
author = {Tang, Wuqian and Wang, Zixiao and Lin, Che-Chien and Fu, Fong-Hua and Shion-Korsak, Laura Ang{\'e}lica and Zhang, Xinyun and Yu, Bei and Wang, Chun-Yao},
title = {{TAPCO: LLM-Guided Design-Adaptive Timing and Power Co-Optimization}},
booktitle = {2026 ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD)},
year = {2026},
numpages = {8},
publisher = {Association for Computing Machinery},
doi = {10.1145/3831599.3840364},
url = {https://doi.org/10.1145/3831599.3840364}
}
ACM/IEEE Design Automation Conference Long Beach, California, USA, Jul. 26–29, 2026
@inproceedings{Liu2026HyPAS,
author = {Liu, Fangzhou and Tang, Wuqian and Wang, Bo-Ying and Shen, An-Chieh and Tsao, Han-Wen and Ye, Yuyang and Shao, Yun and Wang, Chun-Yao and Yu, Bei},
title = {{HyPAS: A Hybrid Optimization Framework for Placement and Sizing Co-Optimization}},
booktitle = {Proceedings of the 63rd ACM/IEEE Design Automation Conference (DAC)},
year = {2026},
publisher = {Association for Computing Machinery},
doi = {10.1145/3770743.3804137},
url = {https://doi.org/10.1145/3770743.3804137}
}
ACM Transactions on Design Automation of Electronic Systems vol. 31, no. 6, pp. 119:1–119:26, 2026
@article{Liu2026CBEVO,
author = {Liu, Fangzhou and Tang, Wuqian and Pei, Zehua and Yu, Ziyang and Zheng, Haisheng and He, Zhuolun and Dai, Mengjia and Chen, Tinghuan and Yu, Bei},
title = {{CB-EVO: Contextual Bandit Tuning with Evolutionary Search for Logic Synthesis}},
journal = {ACM Transactions on Design Automation of Electronic Systems},
year = {2026},
volume = {31},
number = {6},
pages = {119:1--119:26},
articleno = {119},
numpages = {26},
doi = {10.1145/3779431},
url = {https://doi.org/10.1145/3779431},
publisher = {Association for Computing Machinery (ACM)}
}
IEEE/ACM Design, Automation and Test in Europe Valencia, Spain, Mar. 25–27, 2024
@inproceedings{Tang2024ReverseEngineering,
author = {Tang, Wuqian and Li, Yi-Ting and Hsu, Kai-Po and Chou, Kuan-Ling and Lin, You-Cheng and Chien, Chia-Feng and Hsu, Tzu-Li and Chen, Yung-Chih and Wang, Ting-Chi and Chang, Shih-Chieh and Hwang, TingTing and Wang, Chun-Yao},
title = {{A Hybrid Approach to Reverse Engineering on Combinational Circuits}},
booktitle = {2024 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
year = {2024},
pages = {1--2},
doi = {10.23919/DATE58400.2024.10546559},
url = {https://doi.org/10.23919/DATE58400.2024.10546559},
publisher = {IEEE}
}
arXiv arXiv:2610.04957 Submitted Oct. 4, 2026
@misc{trinity2026,
author = {Yeh, Shih-Ying and Wang, Tzu-Sian and Wang, Xuehai and Lee, Jia-Hua and Kaplan, Daniel Z. and Xu, Ming-Qi and Tang, Wuqian and Wang, Chun-Yao and Lai, Shang-Hong and Lee, Chun-Yi},
title = {{Trinity: One Differentiable Physics for Training, Refining and Scoring Generative Floorplanners}},
year = {2026},
eprint = {2610.04957},
archivePrefix = {arXiv},
primaryClass = {cs.LG},
url = {https://arxiv.org/abs/2610.04957},
note = {arXiv preprint}
}
IEEE International Conference on Computer Design Hong Kong SAR, China, Nov. 16–18, 2026
@inproceedings{He2026TrojanDetection,
author = {He, Yu-Cheng and Tsao, Han-Wen and Chen, Yung-Chih and Li, Yi-Ting and Tang, Wuqian and Yang, Jian-Meng and Wang, Chun-Yao},
title = {{Observability-Aware Pattern Generation for Hardware Trojan Detection}},
booktitle = {IEEE International Conference on Computer Design},
year = {2026},
note = {To appear}
}
ACM/IEEE International Conference on Computer-Aided Design San Jose, California, USA, Nov. 8–12, 2026
@inproceedings{Wang2026ElectromigrationECO,
author = {Wang, Bo-Ying and Chang, Yong-Fong and Pao, Hsun-Wei and Chen, Yung-Chih and Peng, Tien-Hsin and Hung, Yu-Ting and Cheng, Tsai-Chieh and Li, Yi-Ting and Tang, Wuqian and Wang, Chun-Yao and Chang, Shih-Chieh},
title = {{A Design Rule-Aware Post-Route ECO Framework for Fixing Electromigration Violations}},
booktitle = {ACM/IEEE International Conference on Computer-Aided Design},
year = {2026},
note = {To appear}
}
ACM/IEEE Design Automation Conference Long Beach, California, USA, Jul. 26–29, 2026 pp. 1–2
@inproceedings{Huang2026QUBO,
author = {Huang, Tao-Chun and Tsai, Hao-Yu and Lin, You-Cheng and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Yang, Jian-Meng and Wang, Chun-Yao},
title = {{Late Breaking Results: QUBO Approaches to Logic Equivalence Checking and Testing}},
booktitle = {Proceedings of the 63rd ACM/IEEE Design Automation Conference},
year = {2026},
pages = {1--2},
numpages = {2},
publisher = {Association for Computing Machinery},
doi = {10.1145/3770743.3807713},
url = {https://doi.org/10.1145/3770743.3807713}
}
IEEE/ACM Design, Automation and Test in Europe Verona, Italy, Apr. 20–22, 2026
@inproceedings{Chen2026ApproximateLogicSynthesis,
author = {Chen, Chi-Wei and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Yang, Jian-Meng and Wang, Chun-Yao},
title = {{Learning to Approximate: Circuit Learning and Deep Reinforcement Learning for Approximate Logic Synthesis with an Error Rate Guarantee}},
booktitle = {2026 Design, Automation \& Test in Europe Conference (DATE)},
year = {2026},
pages = {1--7},
doi = {10.23919/DATE69613.2026.11539729},
url = {https://doi.org/10.23919/DATE69613.2026.11539729},
publisher = {IEEE}
}
IEEE/ACM Design, Automation and Test in Europe Verona, Italy, Apr. 20–22, 2026
@inproceedings{Lin2026QuantumEquivalence,
author = {Lin, You-Cheng and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Chu, Chia-Chieh and Wang, Chun-Yao},
title = {{A Mathematical Exploration to Equivalence Checking of Quantum Circuits}},
booktitle = {2026 Design, Automation \& Test in Europe Conference (DATE)},
year = {2026},
pages = {1--3},
doi = {10.23919/DATE69613.2026.11539441},
url = {https://doi.org/10.23919/DATE69613.2026.11539441},
publisher = {IEEE}
}
IEEE International VLSI Symposium on Technology, Systems and Applications Hsinchu, Taiwan, Apr. 13–17, 2026
@inproceedings{Huang2026ChipletProcessSelection,
author = {Huang, Zi-Wei and Li, Yi-Ting and Tang, Wuqian and Cheng, Liang-Chia and Chen, Yung-Chih and Wang, Chun-Yao},
title = {{Process Selection Strategy for Chiplet-Based 2.5D Systems under Design Constraints}},
booktitle = {2026 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)},
year = {2026},
pages = {1--4},
doi = {10.1109/VLSITSA69131.2026.11527556},
url = {https://doi.org/10.1109/VLSITSA69131.2026.11527556},
publisher = {IEEE}
}
IEEE International Symposium on Quality Electronic Design San Francisco, California, USA, Apr. 8–10, 2026
@inproceedings{Shen2026PadDefectClassification,
author = {Shen, Yi-Ting and Liu, Yan-Hsiu and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Shao, Hao-Chiang and Lin, Chia-Wen and Wang, Chun-Yao},
title = {{Integrating Automatic Prompt Engineering and Vision-Language Model for Pad Defect Classification}},
booktitle = {2026 27th International Symposium on Quality Electronic Design (ISQED)},
year = {2026},
pages = {1--7},
doi = {10.1109/ISQED69900.2026.11534705},
url = {https://doi.org/10.1109/ISQED69900.2026.11534705},
publisher = {IEEE}
}
IEEE International Symposium on Quality Electronic Design San Francisco, California, USA, Apr. 8–10, 2026
@inproceedings{Hsu2026NP3Matching,
author = {Hsu, Kai-Po and Li, Yi-Ting and Cai, Fu-Cheng and Chien, Chia-Feng and Tang, Wuqian and Ku, Ting-Yu and Cheng, Yu-Chen and Lai, Tsung-Han and Wang, Cheng-Lung and Shen, Yi-Ting and Chou, Kuan-Ling and Huang, Zi-Wei and Huang, Tao-Chun and Hsu, Tzu-Li and Chen, Yung-Chih and Chang, Shih-Chieh and Wang, Ting-Chi and Hwang, TingTing and Wang, Chun-Yao},
title = {{An Efficient Approach to NP3-Boolean Matching: Leveraging Multi-bit Ports and Reverse Engineering to Minimize Search Space}},
booktitle = {2026 27th International Symposium on Quality Electronic Design (ISQED)},
year = {2026},
pages = {1--8},
doi = {10.1109/ISQED69900.2026.11534659},
url = {https://doi.org/10.1109/ISQED69900.2026.11534659},
publisher = {IEEE}
}
IEEE International Symposium on Quality Electronic Design San Francisco, California, USA, Apr. 8–10, 2026
@inproceedings{Yen2026ThresholdLogic,
author = {Yen, Yu-Chuan and Cai, Fu-Cheng and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Chen, Ihao and Wang, Chun-Yao},
title = {{Area-Oriented Threshold Logic Circuit Synthesis Using Negative Weights}},
booktitle = {2026 27th International Symposium on Quality Electronic Design (ISQED)},
year = {2026},
pages = {1--8},
doi = {10.1109/ISQED69900.2026.11534711},
url = {https://doi.org/10.1109/ISQED69900.2026.11534711},
publisher = {IEEE}
}
IEEE International SoC Design Conference Busan, South Korea, Oct. 15–18, 2025
@inproceedings{Chien2025PadDefectClassification,
author = {Chien, Chia-Feng and Chen, Ming-Wei and Chang, Yin-Chen and Chen, Yung-Chih and Liu, Yan-Hsiu and Shao, Hao-Chiang and Lin, Chia-Wen and Li, Yi-Ting and Tang, Wuqian and Wang, Chun-Yao},
title = {{Improving CNN-based Pad Defect Classification with Enhanced Preprocessing Techniques}},
booktitle = {2025 22nd International SoC Design Conference (ISOCC)},
year = {2025},
pages = {1--2},
doi = {10.1109/ISOCC66390.2025.11330128},
url = {https://doi.org/10.1109/ISOCC66390.2025.11330128},
publisher = {IEEE}
}
ACM Great Lakes Symposium on VLSI New Orleans, Louisiana, USA, Jun. 30 – Jul. 2, 2025
@inproceedings{Chou2025CNNOptimization,
author = {Chou, Kuan-Ling and Wang, Cheng-Lung and Chen, Yung-Chih and Tang, Wuqian and Li, Yi-Ting and Chang, Shih-Chieh and Wang, Chun-Yao},
title = {{CNN Model Optimization Using a Hybrid Approach of Genetic Algorithm-based Pruning and Retraining with Knowledge Distillation}},
booktitle = {Proceedings of the Great Lakes Symposium on VLSI 2025},
year = {2025},
pages = {667--672},
doi = {10.1145/3716368.3735193},
url = {https://doi.org/10.1145/3716368.3735193},
publisher = {ACM}
}
ACM/IEEE Design Automation Conference San Francisco, California, USA, Jun. 22–25, 2025
@inproceedings{Lee2025IRDrop,
author = {Lee, Yu-Che and Chen, Yu-Hsuan and Cheng, Yu-Chen and Chang, Yong-Fong and Lin, Jia-Wei and Pao, Hsun-Wei and Chen, Yung-Chih and Li, Yi-Ting and Tang, Wuqian and Chang, Shih-Chieh and Wang, Chun-Yao},
title = {{Real-Time Dynamic IR-drop Prediction for IR ECO}},
booktitle = {2025 62nd ACM/IEEE Design Automation Conference (DAC)},
year = {2025},
pages = {1--7},
doi = {10.1109/DAC63849.2025.11133331},
url = {https://doi.org/10.1109/DAC63849.2025.11133331},
publisher = {IEEE}
}
IEEE International Symposium on Quality Electronic Design San Francisco, California, USA, Apr. 23–25, 2025
@inproceedings{Hsu2025IMUTrajectory,
author = {Hsu, Kai-Po and Lai, Tsung-Han and Li, Yi-Ting and Tang, Wuqian and Lee, Yun-Ju and Chen, Yung-Chih and Chiu, Wen-Hsin and Wang, Chun-Yao},
title = {{IMU-Based Motion Trajectory Reconstruction and Recognition with Dynamic Calibration on Embedded System Platform}},
booktitle = {2025 26th International Symposium on Quality Electronic Design (ISQED)},
year = {2025},
pages = {1--8},
doi = {10.1109/ISQED65160.2025.11014473},
url = {https://doi.org/10.1109/ISQED65160.2025.11014473},
publisher = {IEEE}
}
Journal of Digital Archives and Digital Humanities vol. 15, pp. 1–35, Apr 2025
@article{Shieh2025OracleBone,
author = {Shieh, Yuh-Pyng and Hsu, Shao-Hang and Tang, Wuqian and Ke, Wei-Ying and Ou, Po-sheng and Chang, Yu-wei and Hwang, Ming-chorng},
title = {{The Lunar-Month-Interval Algorithm for Dating Oracle Bone Inscriptions}},
journal = {Journal of Digital Archives and Digital Humanities},
year = {2025},
number = {15},
pages = {1--35},
month = {April},
note = {In Chinese},
doi = {10.6853/DADH.202504_(15).0001},
url = {https://doi.org/10.6853/DADH.202504_(15).0001}
}
IEEE International Symposium on Intelligent Signal Processing and Communication Systems Kaohsiung, Taiwan, Dec. 10–13, 2024
@inproceedings{Lee2024BoxerPunch,
author = {Lee, Yu-Cheng and Hsu, Kai-Po and Lee, Yun-Ju and Li, Yi-Ting and Tang, Wuqian and Chen, Yung-Chih and Chiu, Wen-Hsin and Wang, Chun-Yao},
title = {{On Construction of Trajectory of Boxer's Punch using a single IMU}},
booktitle = {2024 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)},
year = {2024},
pages = {1--5},
doi = {10.1109/ISPACS62486.2024.10868933},
url = {https://doi.org/10.1109/ISPACS62486.2024.10868933},
publisher = {IEEE}
}
IEEE International System-on-Chip Conference Dresden, Germany, Sep. 16–19, 2024
@inproceedings{Tang2024ModelReduction,
author = {Tang, Wuqian and Huang, Chuan-Shun and Chen, Yung-Chih and Li, Yi-Ting and Chang, Shih-Chieh and Wang, Chun-Yao},
title = {{Model Reduction Using a Hybrid Approach of Genetic Algorithm and Rule-based Method}},
booktitle = {2024 IEEE 37th International System-on-Chip Conference (SOCC)},
year = {2024},
pages = {1--6},
doi = {10.1109/SOCC62300.2024.10737843},
url = {https://doi.org/10.1109/SOCC62300.2024.10737843},
publisher = {IEEE}
}
IEEE International VLSI Symposium on Technology, Systems and Applications Hsinchu, Taiwan, Apr. 22–25, 2024
@inproceedings{Huang2024NetworkPruning,
author = {Huang, Chuan-Shun and Tang, Wuqian and Chen, Yung-Chih and Li, Yi-Ting and Chang, Shih-Chieh and Wang, Chun-Yao},
title = {{An Efficient Approach to Iterative Network Pruning}},
booktitle = {2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)},
year = {2024},
pages = {1--4},
doi = {10.1109/VLSITSA60681.2024.10546442},
url = {https://doi.org/10.1109/VLSITSA60681.2024.10546442},
publisher = {IEEE}
}
National Tsing Hua University
Advised by Prof. Chun-Yao Wang and Prof. Bei Yu (CUHK)
National Tsing Hua University
Advised by Prof. Chun-Yao Wang
Ming Chuan University
Giga Design Automation
Shanghai PI: Dr. Yun Shao
Shenzhen Research Institute, The Chinese University of Hong Kong
Shenzhen PI: Prof. Bei Yu
Second Place, MLCAD Contest
LLM-based Algorithm Discovery for Timing Optimization
Second Place, IWLS Programming Contest
LLM-based heterogeneous portfolio of AIG seeds, refined by evolutionary multi-tool synthesis and Pareto search.
Hsinchu City Outstanding Youth
Hsinchu City Government College / University Division
First Place (Problem C), ICCAD CAD Contest
Incremental Placement Optimization Beyond Detailed Placement: Simultaneous Gate Sizing, Buffering, and Cell Relocation
Synopsys – Prof. Chung Laung Liu Ph.D. Scholarship
Synopsys Taiwan & Taiwan IC Design Society
Qilin Cup, Integrated Circuit EDA Elite Challenge
Chinese Institute of Electronics First among 400+ teams
First Place (Problem A), ICCAD CAD Contest
Learning Arithmetic Operations from Gate-Level Circuit
Honorable Mention (Problem A), ICCAD CAD Contest
LLM-Assisted Netlist Exploration and Transformation
Outstanding Teaching Assistant Award × 3
National Tsing Hua University Spring 2025, Fall 2025, Spring 2026
Second Place, ISPD Contest
Post-placement buffering and sizing
Second Place (Problem A), ICCAD CAD Contest
Hardware Trojan Detection on Gate Level Netlist
Student Scholar Program Award
IEEE/ACM International Conference on Computer-Aided Design
Presidential Hsing Chien Award
National Tsing Hua University One of 13 university-wide recipients
Second Place (Problem A), ICCAD CAD Contest
Reinforcement Logic Optimization for a General Cost Function
Second Place, ICCAD CADathlon
ACM/SIGDA CADathlon Programming Contest Olympic Games of EDA
Honorable Mention (Problem B), ICCAD CAD Contest
Power and Timing Optimization Using Multibit Flip-Flop
Honorable Mention (Problem A), ICCAD CAD Contest
Multi-bit Large-scale Boolean Matching
Third Place, EDAthon
IEEE CEDA Hong Kong Chapter Electronic design automation programming competition
First Place, MCU Programming Contest
Ming Chuan University Advanced Division (2019, 2020)
Honorable Mention, Central Taiwan Programming Contest
National Changhua University of Education Central Taiwan collegiate programming competition
Silver Award, ICPC Asia Taipei–Hsinchu Regional
ICPC Foundation Asia Taipei–Hsinchu regional programming contest
Honorable Mention, NCPC
Ministry of Education, Taiwan Collegiate programming competition (2018, 2019, 2020)
Bronze Award, ICPC Asia Taipei–Hsinchu Regional
ICPC Foundation Asia Taipei–Hsinchu regional programming contest
Silver Award, TOPC
ICPC Foundation Taiwan Online Programming Contest
Silver Prize, NCPU
ICPC Foundation Taiwan National Contest for Private Universities
First Place, Intercollegiate Freshman Cup Programming Contest
Ming Chuan University Programming competition for first-year students
Third Place & Popularity Award, Three-University Software Innovation Exhibition and Competition
Fu Jen Catholic University Software innovation competition under a Ministry of Education program
Teaching assistant for courses in programming, computer architecture, logic synthesis, integrated circuit design, and hardware security.
Introduction to Programming
Prof. Yu-Guang Chen Department of Electrical Engineering [Course Website]
Fall 2026
Hardware Security
Prof. Yu-Guang Chen and Prof. TingTing Hwang Institute of Information Security [Student Evaluations]
Spring 2026
Advanced Logic Synthesis
Prof. TingTing Hwang Department of Computer Science [Student Evaluations]
Spring 2025, Spring 2026
Introduction to Integrated Circuit Design
Prof. Yu-Guang Chen Department of Computer Science [Student Evaluations]
Fall 2025
Computer Architecture
Prof. TingTing Hwang Department of Computer Science [Student Evaluations]
Fall 2024, Fall 2025
Design Automation (I)
Prof. Jeong-Tyng Li College of Semiconductor Research [Student Evaluations]
Spring 2025
Excellent Teaching Assistant Award (Spring 2026) Outstanding Teaching Assistant Award (Spring 2025, Fall 2025, Spring 2026)
Outside research, I enjoy badminton, swimming, and table tennis.
In May 2025, I won first place in badminton doubles at National Tsing Hua University's Interdepartmental Cup. [Medal]
